Lec 05-01-2025: Cache Mapping Strategies
There are three main strategies for deciding where in the cache a memory block can be stored. They differ in how much freedom blocks have in choosing their location, which in turn affects hardware cost, lookup speed, and miss rate.
Associative Mapping (aka Fully Associative)
Section titled “Associative Mapping (aka Fully Associative)”The idea here is to give blocks complete freedom: any block from main memory can go into any cache line. Because a block can be “associated” with any line, this is also called Fully Associative mapping.
The flexibility of letting blocks go anywhere means there’s no quick formula to find where a given block ended up. Instead, when the CPU requests a block, the cache has to check all lines to see if any of them holds it. To improve the search time, each line gets its own hardware comparator to then be able to invoke a parallel search — fast, but the hardware cost grows with the number of lines, so this approach is only practical for small caches.
Since any block can occupy any line, each line needs to store the block’s number as a tag, so the cache knows which block is currently sitting there.
Cache line structure:
- Valid/Invalid bit
- Tag (block number)
- Data (could be multiple words)
Consider a situation where we get the following sequence of block accesses:
indicates a miss.
indicates a hit.
The diagram shows a cache that has been filled up with blocks 5, 2, 20, and 30 through successive cold misses. When block 15 is accessed next, it’s also a miss — and since every line is occupied, something has to be evicted to make room.
The standard replacement policy for fully associative caches is LRU (Least Recently Used): the block that hasn’t been accessed for the longest time gets replaced. The reasoning is that recently used data is more likely to be needed again soon, so you keep what’s fresh and discard what’s stale.
Example Problem
Section titled “Example Problem”Find the number of misses with a fully associative mapping, consisting of 4 one-word blocks, given the following sequence of block addresses:
Solution:
Direct Mapping
Section titled “Direct Mapping”Rather than searching all lines, direct mapping assigns each memory block to exactly one cache line, determined by:
This makes lookups fast and cheap — no parallel search needed, since the cache goes directly to the one line a block can occupy. The downside is that many blocks share the same line (e.g., in a 4-line cache, blocks 0, 4, 8, 12, … all map to line 0). If two of those blocks are accessed frequently together, they’ll keep evicting each other even though other lines sit empty — a problem called thrashing.
Since multiple blocks map to the same line, each line stores a tag identifying which block is currently there. Without it, there’d be no way to tell whether the block currently in line 0 is block 0, block 4, or block 8.
Cache line structure:
- Tag (to tell apart blocks sharing the same line)
- Line Index
- Word offset (if multiple words per block)
Example Problem
Section titled “Example Problem”Find the number of misses with Direct Mapping, consisting of 4 one-word blocks, given the following sequence of block addresses:
Solution:
Set Associative Mapping
Section titled “Set Associative Mapping”Set associative mapping is a middle ground between the above two strategies. The cache is divided into sets, each holding a fixed number of lines.
- Which set a block goes to is determined by direct mapping:
- Which line within that set is chosen by fully associative placement — the block can go into any line in the set
This limits the parallel search to just the lines within one set (far fewer comparators than fully associative), while still giving enough flexibility within each set to reduce thrashing.
The number of lines per set is called the N-way count:
- 8 lines, 2 sets 4 lines/set 4-way associative
- 8 lines, 4 sets 2 lines/set 2-way associative
Example Problem
Section titled “Example Problem”Find the number of misses with a 2-way set associative mapping, consisting of 4 one-word blocks, given the following sequence of block addresses:
Solution:
Blocks are inserted into set :
With 2 sets, even-numbered blocks go to and odd-numbered blocks go to . Each set holds 2 lines and uses LRU when full.