Lec 03-04-2025: Non-Binary Counter | CSCI 343

Non-Binary Counter Design

A non-binary counter is a synchronous counter that cycles through a subset of states, skipping others. In this example, we design a counter for the following sequence using JK flip-flops:

$$0 \to 1 \to 2 \to 4 \to 5 \to 6 \to 0 \to \cdots$$

States 3 (011) and 7 (111) are missing from the sequence, so they are the unused states for this counter. When drawing the state diagram, we have the option to include them as nodes but with no transitions leading into them, since they’re unused — we treat them as don’t-care conditions in the K-maps.

State Table

We first lay out the state table for the desired transitions:

$$\begin{array}{ccc|ccc|cccccc} & Q(t) & & & Q(t{+}1) & & & & \text{f/f} & \text{Inputs} & & \\ \hline A & B & C & A & B & C & J_A & K_A & J_B & K_B & J_C & K_C \\ \hline 0 & 0 & 0 & 0 & 0 & 1 & & & & & & \\ 0 & 0 & 1 & 0 & 1 & 0 & & & & & & \\ 0 & 1 & 0 & 1 & 0 & 0 & & & & & & \\ 1 & 0 & 0 & 1 & 0 & 1 & & & & & & \\ 1 & 0 & 1 & 1 & 1 & 0 & & & & & & \\ 1 & 1 & 0 & 0 & 0 & 0 & & & & & & \\ \end{array}$$

The JK flip-flop’s excitation table tells us the required J and K inputs for any given $Q(t) \to Q(t{+}1)$ transition:

$$\begin{array}{cc|cc} Q(t) & Q(t+1) & J & K \\ \hline 0 & 0 & 0 & X \\ 0 & 1 & 1 & X \\ 1 & 0 & X & 1 \\ 1 & 1 & X & 0 \\ \end{array}$$

We apply the JK excitation table to determine the required J and K inputs for each flip-flop in each state transition:

$$\begin{array}{ccc|ccc|cccccc} & Q(t) & & & Q(t{+}1) & & & & \text{f/f} & \text{Inputs} & & \\ \hline A & B & C & A & B & C & J_A & K_A & J_B & K_B & J_C & K_C \\ \hline 0 & 0 & 0 & 0 & 0 & 1 & 0 & X & 0 & X & 1 & X \\ 0 & 0 & 1 & 0 & 1 & 0 & 0 & X & 1 & X & X & 1 \\ 0 & 1 & 0 & 1 & 0 & 0 & 1 & X & X & 1 & 0 & X \\ 1 & 0 & 0 & 1 & 0 & 1 & X & 0 & 0 & X & 1 & X \\ 1 & 0 & 1 & 1 & 1 & 0 & X & 0 & 1 & X & X & 1 \\ 1 & 1 & 0 & 0 & 0 & 0 & X & 1 & X & 1 & 0 & X \\ \end{array}$$

States 3 (011) and 7 (111) are unused — they are treated as don’t-care conditions ($X$) in every K-map cell.

If we wanted, we could include them in the table — their flip-flop input entries would just be all don’t-cares:

$$\begin{array}{ccc|ccc|cccccc} & Q(t) & & & Q(t{+}1) & & & & \text{f/f} & \text{Inputs} & & \\ \hline A & B & C & A & B & C & J_A & K_A & J_B & K_B & J_C & K_C \\ \hline 0 & 0 & 0 & 0 & 0 & 1 & 0 & X & 0 & X & 1 & X \\ 0 & 0 & 1 & 0 & 1 & 0 & 0 & X & 1 & X & X & 1 \\ 0 & 1 & 0 & 1 & 0 & 0 & 1 & X & X & 1 & 0 & X \\ {\color{red}0} & {\color{red}1} & {\color{red}1} & X & X & X & X & X & X & X & X & X \\ 1 & 0 & 0 & 1 & 0 & 1 & X & 0 & 0 & X & 1 & X \\ 1 & 0 & 1 & 1 & 1 & 0 & X & 0 & 1 & X & X & 1 \\ 1 & 1 & 0 & 0 & 0 & 0 & X & 1 & X & 1 & 0 & X \\ {\color{red}1} & {\color{red}1} & {\color{red}1} & X & X & X & X & X & X & X & X & X \\ \end{array}$$

K-Maps and Flip-Flop Input Expressions

$J_A:$

$$J_A = B$$

$K_A:$

$$K_A = B$$

$J_B:$

$$J_B = C$$

$K_B:$

$$K_B = 1$$

$J_C:$

$$J_C = B'$$

$K_C:$

$$K_C = 1$$

The Circuit

Check for Self-Correction

To check whether the circuit is self-correcting, we plug each unused state into the derived flip-flop expressions and trace where the circuit goes next. As with the S/R case covered previously, we interpret the resulting J/K values according to the flip-flop’s characteristic behavior: $J=0, K=0$ holds; $J=1, K=0$ sets; $J=0, K=1$ resets; and $J=1, K=1$ complements (toggles).

$$\begin{aligned} J_A &= B \quad & J_B &= C \quad & J_C &= B' \\ K_A &= B \quad & K_B &= 1 \quad & K_C &= 1 \end{aligned}$$

Unused state ABC = 011:

$$\begin{aligned} J_A &= B = 1 \quad & K_A &= B = 1 & &\Rightarrow \text{complement } A \text{ (}0 \to 1\text{)} \\ J_B &= C = 1 & K_B &= 1 & &\Rightarrow \text{complement } B \text{ (}1 \to 0\text{)} \\ J_C &= B' = 0 & K_C &= 1 & &\Rightarrow \text{reset } C \text{ to } 0 \end{aligned}$$ $$011 \to 100$$

State 100 is valid, so the circuit self-corrects out of state 011.

Unused state ABC = 111:

$$\begin{aligned} J_A &= B = 1 \quad & K_A &= B = 1 & &\Rightarrow \text{complement } A \text{ (}1 \to 0\text{)} \\ J_B &= C = 1 & K_B &= 1 & &\Rightarrow \text{complement } B \text{ (}1 \to 0\text{)} \\ J_C &= B' = 0 & K_C &= 1 & &\Rightarrow \text{reset } C \text{ to } 0 \end{aligned}$$ $$111 \to 000$$

State 000 is valid, so the circuit also self-corrects out of state 111.

Complete State Diagram

With the self-correction transitions now known, we can complete the state diagram by adding the transitions out of the unused states: